verilog HDLBits刷题“Adder100i”---Generate for-loop:100-bit bnary adder 2

一、题目

Create a 100-bit binary ripple-carry adder by instantiating 100 full adders. The adder adds two 100-bit numbers and a carry-in to produce a 100-bit sum and carry out. To encourage you to actually instantiate full adders, also output the carry-out fromeachfull adder in the ripple-carry adder. cout[99] is the final carry-out from the last full adder, and is the carry-out you usually see.

Module Declaration

module top_module( input [99:0] a, b, input cin, output [99:0] cout, output [99:0] sum );

二、分析

第一位求和时，有额外的进位cin，所以单独写，其他位的求和都是当前位的输入之和 加上 上一位求和得到的进位，可用for循环

三、代码实现

module top_module( input [99:0] a, b, input cin, output [99:0] cout, output [99:0] sum ); integer i; assign {cout[0],sum[0]}=a[0]+b[0]+cin; always@(*)begin for(i=1;i<100;i=i+1)begin {cout[i],sum[i]}=a[i]+b[i]+cout[i-1]; end end endmodule