chipcamp@chipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统@十年旧机器。
PRETTY_NAME="Ubuntu 22.04 LTS"
NAME="Ubuntu"
VERSION_ID="22.04"
VERSION="22.04 (Jammy Jellyfish)"
VERSION_CODENAME=jammy
ID=ubuntu
ID_LIKE=debian
HOME_URL="https://www.ubuntu.com/"
SUPPORT_URL="https://help.ubuntu.com/"
BUG_REPORT_URL="https://bugs.launchpad.net/ubuntu/"
PRIVACY_POLICY_URL="https://www.ubuntu.com/legal/terms-and-policies/privacy-policy"
UBUNTU_CODENAME=jammy
chipcamp@chipcamp:~/src/riscv$ which iverilog
/usr/bin/iverilog
chipcamp@chipcamp:~/src/riscv$ which verilator
/usr/bin/verilator
chipcamp@chipcamp:~/src/riscv$ which gtkwave
/usr/bin/gtkwave
chipcamp@chipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc
/usr/bin/riscv64-unknown-elf-gcc
chipcamp@chipcamp:~/src/riscv$
chipcamp@chipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcc
iverilog: /usr/bin/iverilog
verilator: /usr/bin/verilator
gtkwave: /usr/bin/gtkwave
gcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc
------以上所有的软件，都是使用apt-get install安装的，这是本文所说的“0依赖”。
chipcamp@chipcamp:~/src/riscv$ git clone https://gitcode.com/chipcamp/darkriscv.git
Cloning into 'darkriscv'...
remote: Enumerating objects: 3796, done.
remote: Total 3796 (delta 0), reused 0 (delta 0), pack-reused 3796 (from 1)
Receiving objects: 100% (3796/3796), 4.96 MiB | 482.00 KiB/s, done.
Resolving deltas: 100% (2536/2536), done.
chipcamp@chipcamp:~/src/riscv$ cd darkriscv
chipcamp@chipcamp:~/src/riscv/darkriscv$ ls -la
total 180
drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 .
drwxrwxr-x 4 chipcamp chipcamp 4096 Oct 7 11:03 ..
-rw-rw-r-- 1 chipcamp chipcamp 6 Oct 7 11:04 .bazelversion
drwxrwxr-x 24 chipcamp chipcamp 4096 Oct 7 11:04 boards
-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 11:04 BUILD.bazel
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 comments
-rw-rw-r-- 1 chipcamp chipcamp 3759 Oct 7 11:04 darkriscv.core
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 doc
drwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 11:04 .git
-rw-rw-r-- 1 chipcamp chipcamp 161 Oct 7 11:04 .gitattributes
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 .github
-rw-rw-r-- 1 chipcamp chipcamp 255 Oct 7 11:04 .gitignore
-rw-rw-r-- 1 chipcamp chipcamp 1517 Oct 7 11:04 LICENSE
-rw-rw-r-- 1 chipcamp chipcamp 2201 Oct 7 11:04 Makefile
-rw-rw-r-- 1 chipcamp chipcamp 708 Oct 7 11:04 MODULE.bazel
-rw-rw-r-- 1 chipcamp chipcamp 32687 Oct 7 11:04 MODULE.bazel.lock
-rw-rw-r-- 1 chipcamp chipcamp 71846 Oct 7 11:04 README.md
drwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 rtl
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 sim
drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 src
drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 tmp
chipcamp@chipcamp:~/src/riscv/darkriscv$ more Makefile
default: src/darksocv.mem
make -C sim
all:
make -C src all
make -C sim all
make -C boards all
src/darksocv.mem:
make -C src all
install:
make -C boards install
chipcamp@chipcamp:~/src/riscv/darkriscv$ make default
make -C sim
make[1]: Entering directory '/home/chipcamp/src/riscv/darkriscv/sim'
iverilog -Wall -I ../rtl -o darksocv darksimv.v ../rtl/darksocv.v ../rtl/darkbridge.v ../rtl/darkuart.v ../rtl/darkriscv.v ../rtl/darkpll.v ../rtl/darkram.v ../rtl/darkio.v ../rtl/darkcache.v ../rtl/darkmac.v ../rtl/lib/sdram/mt48lc16m16a2_ctrl.v
echo "VCDS=darksocv.vcd: XSIM=darksocv"
VCDS=darksocv.vcd: XSIM=darksocv
dpram: unified BRAM w/ 2048x32-bit
WARNING: ../rtl/darkram.v:88: $readmemh(../src/darksocv.mem): Not enough words in the file for the requested range [0:2047].
VCD info: dumpfile darksocv.vcd opened for output.
reset (startup)
sdram: CLK: 64 MHz
sdram: WAIT_100US: 6400 cycles
sdram: TRP: 2 cycles
sdram: TRC: 5 cycles
sdram: TRCD: 2 cycles
sdram: TCH: 1 cycles
sdram: CAS_LATENCY: 2 cycles
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
vvvvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv
rrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv
rr vvvvvvvvvvvvvvvvvvvvvv
rr vvvvvvvvvvvvvvvvvvvvvvvv rr
rrrr vvvvvvvvvvvvvvvvvvvvvvvvvv rrrr
rrrrrr vvvvvvvvvvvvvvvvvvvvvv rrrrrr
rrrrrrrr vvvvvvvvvvvvvvvvvv rrrrrrrr
rrrrrrrrrr vvvvvvvvvvvvvv rrrrrrrrrr
rrrrrrrrrrrr vvvvvvvvvv rrrrrrrrrrrr
rrrrrrrrrrrrrr vvvvvv rrrrrrrrrrrrrr
rrrrrrrrrrrrrrrr vv rrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrr
rrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrr
INSTRUCTION SETS WANT TO BE FREE
boot0: main@0200 stack@1f7c
board: simulation only (id=0)
build: Sun, 12 Apr 2026 18:43:41 -0300 for rv32i_zicsr
core0: darkriscv@100MHz rv32i little-endian
bram0: text@0200+1424 data@1624+08f8 stack@2000
bram0: 228 bytes free
uart0: 115.2kbps (div=25603)
timr0: 1000Hz (div=99999)
csrxx: not found
stvec: not found
mtvec: not found (polling)
Welcome to DarkRISCV!
497> help
help
command: [help] not found.
valid commands: clear, dump [hex], led [hex], timer [dec], oport [hex]
mul [dec] [dec], div [dec] [dec], mac [dec] [dec] [dec]
reboot, wr[m][bwl] [hex] [hex] [[hex] when m],
rd[m][bwl] [hex] [[hex] when m], iport
112> dump 100
dump 100
0100: 63 16 55 00 13 05 d0 00 6f f0 1f fe 67 80 00 00 c.U.....o...g...
0110: 63 0e 05 00 13 05 f5 ff 83 82 47 00 93 f2 22 00 c.........G...".
0120: e3 88 02 fe 03 c5 57 00 67 80 00 00 13 05 f0 ff ......W.g.......
0130: 67 80 00 00 0e a0 c1 12 9c c1 4d 07 9a c1 50 06 g.........M...P.
0140: 98 c1 52 04 98 c1 52 04 98 c1 52 04 98 c1 50 06 ..R...R...R...P.
0150: 96 02 c1 4d 07 96 04 c1 42 10 96 06 c1 42 0c 98 ...M....B....B..
0160: 06 42 c1 44 06 9a 06 44 c1 46 06 96 06 46 c1 48 .B.D...D.F...F.H
0170: 06 92 06 48 c1 4a 06 8e 06 4a c1 4c 06 8a 06 4c ...H.J...J.L...L
0180: c1 4e 06 86 06 4e c1 50 06 82 06 50 c1 52 0a 52 .N...N.P...P.R.R
0190: c1 54 06 54 c1 56 02 56 c2 07 00 20 72 76 0a 49 .T.T.V.V... rv.I
01a0: 4e 53 54 52 55 43 54 49 4f 4e 20 53 45 54 53 20 NSTRUCTION SETS
01b0: 57 41 4e 54 20 54 4f 20 42 45 20 46 52 45 45 0a WANT TO BE FREE.
01c0: 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
01e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
01f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
1921> led 1
led 1
led = 01
17> led 2
led 2
led = 02
17> ^C
** VVP Stop(0) **
** Flushing output streams.
** Current simulation time is 2632995000 ticks.
> finish
** Continue **
make[1]: *** [Makefile:98: darksocv.vcd] Interrupt
make: *** [Makefile:43: default] Interrupt
------以上，就是使用make default后运行iverilog对darkriscv项目总共11个verilog文件的仿真运行，提供了一个类似于操作系统bash交互的运行界面！
----事实上，这个运行界面，是非常逼真的App on RISC-V，从src/Makefile可以看到这个App是darkshell，这是众多App中的其中一个，通过更改src/Makefile可以将App改为coremark或者dhrystone等。但真正最好玩、对RISC-V + SystemSoftware的体验最好的，无疑就是这个darkriscv。
----这个darkshell的App，背后的darksoc，是包含了CPU+总线+uart串口的，而这个darkshell的App的交互式输入输出，是通过uart完成的。即使在仿真中，也实际使用了CPU RTL + CPU uart的！可以这样说，这个项目要移植到某个FPGA中，可以确认它的UART串口能按照预期提供交互式的darkshell功能！因为，这个功能已经经过了仿真。
----如下是波形文件，特别关注它的UART相关信号，是有实际的信号值的。
chipcamp@chipcamp:~/src/riscv/darkriscv$ find . -name "*.vcd"
./sim/darksocv.vcd
chipcamp@chipcamp:~/src/riscv/darkriscv$ find . -name "*.vcd" | xargs ls -l
-rw-rw-r-- 1 chipcamp chipcamp 278636077 Oct 7 11:20 ./sim/darksocv.vcd
chipcamp@chipcamp:~/src/riscv/darkriscv$
chipcamp@chipcamp:~/src/riscv/darkriscv$ gtkwave ./sim/darksocv.vcd &
[1] 14295
chipcamp@chipcamp:~/src/riscv/darkriscv$
GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
Warning! File size is 265 MB. This might fail in recoding.
Consider converting it to the FST database format instead. (See the
vcd2fst(1) manpage for more information.)
To disable this warning, set rc variable vcd_warning_filesize to zero.
Alternatively, use the -o, --optimize command line option to convert to FST
or the -g, --giga command line option to use dynamically compressed memory.
[0] start time.
[2632995000] end time.
chipcamp@chipcamp:~/src/riscv/darkriscv$
----如图所示，2632995ns的时间，和上面文字中的[2632995000] end time是一致的。可以推断，testbench.v文件中又是使用的timescale 1 ns / 1 ps，后者才会让iverilog仿真时testbench.v文件输出的vcd文件里记录的end time是ps为单位，而gtkwave的图形显示则是ns为单位。
----左侧窗口里显示了整个darksoc的hierarchy，也就是哪些模块是top模块，哪些是下一级的模块。
----最顶层的darksimv模块，有4个信号，分别是CLK,RES,TX,RX。其中RES大概就是Rest。在图中关注以下这个信号，是在1us的时间点从1变为0的。这和前面picorv32的例子一模一样。
----接着关注uart0模块实例里的LASTCHAR[7:0]这个信号！如下：
----如果仔细观察，可以看出这个LASTCHAR[7:0]信号，包含了上面的darkshell所打印出来的字符串“INSTRUCTION SETS WANT TO BE FREE”的ASCII码流。
----如果仔细操作，这个波形图，针对uart0的LASTCHAR[7:0]信号的观测，可以不断缩小并覆盖全部的时间区间，如图的2600us或者2.6秒。
----以上便是darkriscv的零门槛上手体验，其中darkshell这个App是有源代码的，同时也有编译并生成好的hex文件src/darksocv.mem，在make default的时候这个文件已经是存在的因此无需重新编译，而是直接调用iverilog进行仿真即可，在rtl/darkram.v中会使用readmemh()读取这个darksocv.mem文件。
----如果想从0编译出这个hex文件，可以参考Makefile中的文件进行尝试。不过本次使用的Ubuntu22的环境以及对应的riscv64-unknown-elf-工具，编译的时候出了一点错误，如下所示。这需要进一步解决，但这不影响对darkriscv项目的最核心的体验----darkShell on RISC-V SOC with UART RTL。
chipcamp@chipcamp:~/src/riscv/darkriscv$ make -C src all
make: Entering directory '/home/chipcamp/src/riscv/darkriscv/src'
/usr/bin/riscv64-unknown-elf-gcc -march=rv32i_zicsr-mabi=ilp32-mlittle-endian-c -o boot.o boot.S
riscv64-unknown-elf-gcc: error: unrecognized command-line option '-mlittle-endian'
make: *** [<builtin>: boot.o] Error 1
make: Leaving directory '/home/chipcamp/src/riscv/darkriscv/src'
chipcamp@chipcamp:~/src/riscv/darkriscv$ make all
make -C src all
make[1]: Entering directory '/home/chipcamp/src/riscv/darkriscv/src'
/usr/bin/riscv64-unknown-elf-gcc -march=rv32i_zicsr -mabi=ilp32 -mlittle-endian -c -o boot.o boot.S
riscv64-unknown-elf-gcc: error: unrecognized command-line option '-mlittle-endian'
make[1]: *** [<builtin>: boot.o] Error 1
make[1]: Leaving directory '/home/chipcamp/src/riscv/darkriscv/src'
make: *** [Makefile:46: all] Error 2
chipcamp@chipcamp:~/src/riscv/darkriscv$ vi src/Makefile
chipcamp@chipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --help
Usage: riscv64-unknown-elf-gcc [options] file...
Options:
-pass-exit-codes Exit with highest error code from a phase.
--help Display this information.
--target-help Display target specific command line options.
--help={common|optimizers|params|target|warnings|[^]{joined|separate|undocumented}}[,...].
Display specific types of command line options.
(Use '-v --help' to display command line options of sub-processes).
--version Display compiler version information.
-dumpspecs Display all of the built in spec strings.
-dumpversion Display the version of the compiler.
-dumpmachine Display the compiler's target processor.
-print-search-dirs Display the directories in the compiler's search path.
-print-libgcc-file-name Display the name of the compiler's companion library.
-print-file-name=<lib> Display the full path to library <lib>.
-print-prog-name=<prog> Display the full path to compiler component <prog>.
-print-multiarch Display the target's normalized GNU triplet, used as
a component in the library path.
-print-multi-directory Display the root directory for versions of libgcc.
-print-multi-lib Display the mapping between command line options and
multiple library search directories.
-print-multi-os-directory Display the relative path to OS libraries.
-print-sysroot Display the target libraries directory.
-print-sysroot-headers-suffix Display the sysroot suffix used to find headers.
-Wa,<options> Pass comma-separated <options> on to the assembler.
-Wp,<options> Pass comma-separated <options> on to the preprocessor.
-Wl,<options> Pass comma-separated <options> on to the linker.
-Xassembler <arg> Pass <arg> on to the assembler.
-Xpreprocessor <arg> Pass <arg> on to the preprocessor.
-Xlinker <arg> Pass <arg> on to the linker.
-save-temps Do not delete intermediate files.
-save-temps=<arg> Do not delete intermediate files.
-no-canonical-prefixes Do not canonicalize paths when building relative
prefixes to other gcc components.
-pipe Use pipes rather than intermediate files.
-time Time the execution of each subprocess.
-specs=<file> Override built-in specs with the contents of <file>.
-std=<standard> Assume that the input sources are for <standard>.
--sysroot=<directory> Use <directory> as the root directory for headers
and libraries.
-B <directory> Add <directory> to the compiler's search paths.
-v Display the programs invoked by the compiler.
-### Like -v but options quoted and commands not executed.
-E Preprocess only; do not compile, assemble or link.
-S Compile only; do not assemble or link.
-c Compile and assemble, but do not link.
-o <file> Place the output into <file>.
-pie Create a dynamically linked position independent
executable.
-shared Create a shared library.
-x <language> Specify the language of the following input files.
Permissible languages include: c c++ assembler none
'none' means revert to the default behavior of
guessing the language based on the file's extension.
Options starting with -g, -f,-m, -O, -W, or --param are automatically
passed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.In order to pass
other options on to these processes the -W<letter> options must be used.
For bug reporting instructions, please see:
<https://gcc.gnu.org/bugs/>.
chipcamp@chipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --version
riscv64-unknown-elf-gcc () 10.2.0
Copyright (C) 2020 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
chipcamp@chipcamp:~/src/riscv/darkriscv$
----以上错误信息，Options starting with -g, -f,-m, -O, -W, or --param are automatically
passed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.很有启发意义，说明了gcc命令行是进一步调用了cc(编译器)、ar(汇编器)、ld(链接器)等工具并传递参数的一个门户/入口工具。
<<<<<<<<<<完END>>>>>>>>>>
关键词：darkriscv, uart, timescale, clk, resetn, gtkwave, darkshell, darksocv, app on RISCV SOC RTL。
摘要：本文记录了darkriscv项目的make过程，该项目除了提供RISCV CPU以外，还提供了总线+UART构成了SoC，更重要的是其提供的默认app是darkshell，不仅展现了如操作系统一般的交互式shell界面体验，而且这个交互式shell还是以UART串口为实际的输入输出，也就是说这个shell + RTL-testbench的仿真覆盖了uart串口的功能。
